Undergraduate Senior Project – MASS ExtINCTION: A Video Game Implemented on a 16-bit Soft Processor
By: Brandyn Burbank and Jacob Herrmann
Here is the undergraduate senior project that my colleague and good friend Jacob Herrmann and I put together at Utah Valley University. We wanted to research CPU design, and made it our goal to research and implement a CPU architecture on an FPGA, then write a simple video game to play on it. It was quite the journey, and I think we were both proud of what we learned and accomplished during the semester. We successfully implemented a 16-bit RISC CPU in Verilog, and the game we wrote for it was called MASS ExtINCTION. (A hilarious backronym for Moderately but Adequately Simple Saurian EXTraterrestitrial Impact Naturalization Computer Training Initiative with Okay Novelty). We built a working prototype of the setup, and wrote the hardware manuals to document the system. We also wrote a humorous game manual for MASS ExtINCTION in the spirit of the retro 16-bit video games of the 1980s. Our project abstract is included below.
We implemented a 16-bit RISC CPU as a soft-processor on an FPGA, designed and built an external graphics controller using an Arduino-based microcontroller and an SPI TFT display, and created a program that takes advantage of both the processor and the graphics controller to implement a retro 16-bit style video game. The instruction set architecture used was adapted from the 16-bit RISC Processor designed in Verilog by Van Loi Le. We started by prototyping our game in C# with Unity. Then, using Van Loi Le’s design as our template, we adapted the Verilog code which was originally designed to execute only in simulation, so that it would synthesize a bitstream to program our FPGA. To accomplish this, we added a reset/halt signal, a clock and clock divider module, and I/O ports. We additionally added two new instructions to the architecture, an immediate add instruction, and load input instruction. After implementing the processor on the FPGA we transformed the game’s C# code by hand, mimicking the steps a compiler would take to generate the machine code that would execute on the processor. The final processor was implemented on a ZYBO Z7-10 FPGA. The added I/O ports were used to output data to the graphics controller and receive user input from a custom two button controller. Working on this project gave us a more holistic understanding of the integration of CPU architectures, hardware, and software development. We became acquainted with various I/O implementations, addressing modes, and ISAs, and communication protocols. Furthermore, performing all portions of software development by hand gave us an in depth perspective of the operations performed by the compiler when going from a high level programming language, to assembly, to machine code.
(As submitted to National Conference on Undergraduate Research, 2020)